Finishing a complex mixed-signal IC or SoC with conventional approaches is a time-consuming and labor intesive task that can delay tapeout schedules by weeks. Massive chips with hundreds of millions of transistors and GDSII files that reach over 100 GB make loading, viewing and editing layouts a challenge. Manual analog and special-net routing become especially difficult when late ECOs require extensive rework. And lacking a unified data model, the database containing the sign-off DRC/LVS corrections and chip finishing must be exported out of the analog/mixed-signal design tool and into the place-and-route tool for sign-off timing, power and rail analysis.

Magma's Titan provides a quantum leap in automation and integration for mixed-signal design. Download the white paper and
learn more about Titan, including how it:

• Leverages a single data model to provide a true mixed-signal environment that integrates analog and digital design, layout and place & route. Unlike Synopsys’ Galaxy^TM Custom Designer layout/schematic editors and IC Compiler, which use two different databases.
• Includes fast, high-capacity layout & schematic editors, allowing easy manipulation of the largest designs.
• Automates analog and special-net routing through an efficient constraints-based approach.
• Makes all custom layout changes immediately available to the place-and-route sub-system for sign-off analysis through a live interface.
• Implements a late ECO that affects both analog and standard-cell components without significantly delaying the schedule.

 Design Ahead of the Curve™

Magma is a registered trademark and Titan is a trademark of Magma Design Automation. Any other trademarks or registered trademarks mentioned are the intellectual property of their respective owners.