Chip-Package Co-Design

Package-aware I/O planning during the design flow reduces costs and turnaround time

Package-aware I/O planning is essential for meeting the cost, time-to-market and performance targets of today’s IC. Without such planning, excessive package complexity can significantly increase product cost – often pushing a chip’s package cost higher than the cost of its silicon. Additionally, I/O problems may limit performance and go undetected until verification; the numerous design cycles required to correct the problems may delay time to market by weeks. Automated I/O planning must be introduced early in the design cycle.

Magma’s RioMagic products provide key capabilities needed for package-aware I/O planning including I/O synthesis, placement and routing:

RioMagic is a package-aware chip design and optimization tool that takes package escape, routability and parasitics into consideration, enabling simultaneous tradeoffs between chip and package design issues.
RioMagic for Wire Bond has the same capabilities as RioMagic, but takes only package routability and parasitics into consideration.

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