Low Power

Integrating power analysis and optimization into implementation minimizes power

Increasing use of battery-powered portable electronic systems drives demand for digital integrated circuits (ICs) that consume the least power possible. At the same time, designers must pack more functionality onto chips that operate at very high frequencies, while minimizing the package size. Increasing performance and cell count results in increased power, making power management critical to silicon success.

To achieve optimal results without increasing turnaround time, continuous, on-the-fly tradeoffs between power and timing have to be made throughout the RTL-to-GDSII flow. Traditional approaches to power management require multiple tools and use of custom techniques. This lack of integration makes it impossible for point-tool flows to adequately address power and other design requirements.

Magma integrates power analysis and optimization into implementation to allow designers to address power throughout the RTL-to-GDSII flow.

Talus Power Pro enables optimal power management throughout the flow with power-aware synthesis, physical optimization, clock tree synthesis and routing, allowing designers to minimize power and ensure uniform power distribution.
Quartz Rail integrates power analysis and planning, voltage-drop analysis, voltage-drop-induced delay analysis and electromigration analysis on rail wires and vias, enabling designers to maintain power integrity in their designs.